Next, they plan to further beta test the laser debonding tech as they approach implementation into an actual manufacturing line. The two companies-partners for more than 20 years-have been working on this laser debonding technology for four years, including the construction of a beta system in Albany, New York-specifically, at the Albany Nanotech Complex, a semiconductor R&D hub. This process was demonstrated using a new 300mm module, which the companies say is the first 3D stacked silicon chip wafer at the 300mm level. The two companies say that this has a number of benefits: first and foremost, it removes the need for glass in the production process, but it also, they say, reduces compatibility issues, reduces defects and process issues and enables testing of thinner wafers and other new technologies.

Their new method uses an infrared laser to debond the silicon carrier wafer from the other silicon wafers. IBM and Tokyo Electron, however, have found a way to enable silicon carrier wafers for 3D chipmaking without the current drawbacks. So, instead, carrier wafers are typically glass wafers removed with ultraviolet lasers. Those wafers can also be made of silicon, but separating the silicon carrier wafer from the silicon wafer for the chip is tricky, and the mechanical force that is typically used to perform the separation can damage the remaining wafers. The stacked silicon wafers that comprise a 3D-stacked chip are, during production, mounted on a carrier wafer. The latest front: 3D chip stacking, which has seen high-profile efforts from several companies as they seek to turn “transistors per unit area” into “transistors per unit volume.” Now, IBM and Japanese semiconductor company Tokyo Electron are announcing a new breakthrough in 3D chip stacking that removes the need for a glass wafer base, streamlining the process. The battle against the slowing of Moore’s law continues.

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